AFBR-57F5MZ-ELX 16Gb SFP+ Fiber Channel Optical Transceiver Avago

AFBR-57F5MZ-ELX 16Gb SFP+ Digital Diagnostic SFP 850 nm 16G Low Voltage 3.3 V Fiber Channel Optical Transceiver by Avago is on sale in refurbished condition, includes warranty and technical support. The AvagoAFBR-57F5MZ-ELX optical transceiver supports high speed serial links over multi-mode optical fiber at signaling rates up to 14.025 Gbs or serial line rate of 16GFC. The Avago AFBR-57F5MZ-ELX 16GFC SFP+ Fiber Channel Optical Transceiver is compliant with Small Form Pluggable industry agreements SFP and SFP+ for mechanical and low speed electrical specifications. High speed electrical and optical specifications are compliant with ANSI Fiber Channel FC-PI-5. Read the AFBR-57F5MZ-ELX data sheet for manufacture details and product specifications.

The Avago AFBR-57F5MZELX 16Gb SFP+ Fiber Channel Optical Transceiver is a multi-rate 850nm transceiver which ensures compliance with FC-PI-5 16GFC, 8GFC and 4GFC specifications. Per the requirements of 16GFC, internal clock and data recovery circuits CDRs are present on both electrical input and electrical output of this transceiver. These CDRs will lock at 14.025 Gbs or 16GFC, but must be bypassed for operation at 8.5 Gbs or 8GFC and 4.25 Gb/s or 4GFC, accomplished by using two Rate Select inputs to configure transmit and receive sides. Transmitter and receiver can operate at different data rates, as is often seen during Fiber Channel speed negotiation. Digital diagnostic monitoring information DMI is present in the AFBR-57F5MZ-ELX per the requirements of SFF-8472, providing real time monitoring information of transceiver laser, receiver and environment conditions over an SFF-8431 2-wire serial interface.

AFBR-57F5MZ-ELX Features
Compliance with RoHS directives
850 nm Vertical Cavity Surface Emitting Laser (VCSEL)
Class 1 eye safe per IEC60825-1 and CDRH
Wide temperature range (0 °C to 70 °C)
LC duplex connector optical interface conforming to ANSI TIA/EIA604-10 (FOCIS 10A)
Diagnostic features per SFF-8472 “Diagnostic Monitoring Interface for Optical Transceivers”
Enhanced operational features including EWRAP, OWRAP and variable electrical EQ/emphasis settings
Real time monitoring of:
Transmitter average optical power Received average optical power
Laser bias current Temperature
Supply Voltage
SFP+ mechanical specifications per SFF-8432
SFP+ compliant low speed interface
Fiber Channel FC-PI-5 compliant optical link distances
Fiber Channel FC-PI-5 compliant high-speed interface
1600-SN-M6-S, 800-SN-M6-S, 400-SN-M6-I
1600-SN-M5-S, 800-SN-M5-S, 400-SN-M5-I
1600-SN-M5E-I, 800-SN-M5E-I, 400-SN-M5E-I
1600-SN-M5F-I, 800-SN-M5F-I, 400-SN-M5F-I

Applications of the AFBR-57F5MZ 16GFC SFP+ Fiber Channel Optical Transceiver
Fiber Channel switches (director, stand alone, blade)
Fiber Channel Host Bus Adapters
Fiber Channel RAID controllers
Fiber Channel tape drive
Port side connections
Inter-switch or inter-chassis aggregated links

Installation of the AFBR-57F5MZ-ELX 16GFC SFP+ Fiber Channel Optical Transceiver
The AFBR-57F5MZ-ELX can be installed in any SFF-8074i compliant Small Form Pluggable SFP port regardless of host equipment operating status. The AFBR-57F5MZ is hot-pluggable, allowing the module to be installed while the host system is operating online. Upon insertion, the transceiver housing makes initial contact with the host board SFP cage, mitigating potential damage due to Electro-Static Discharge ESD.

Digital Diagnostic Interface and Serial Identification
The 2-wire serial interface is based on ATMEL AT24C01A series EEPROM protocol and signaling detail. Conventional EEPROM memory, bytes 0-255 at memory address 0xA0, is organized in compliance with SFF-8074i. New digital diagnostic information, bytes 0-255 at memory address 0xA2, is compliant to SFF-8472. The new diagnostic information provides the opportunity for Predictive Failure Identification, Compliance Prediction, Fault Isolation and Component Monitoring.

Predictive Failure Identification
The AFBR-57F5MZ-ELX predictive failure feature allows a host to identify potential link problems before system performance is impacted. Prior identification of link problems enables a host to service an application via “fail over” to a redundant link or replace a suspect device, maintaining system uptime in the process. For applications where ultra-high system uptime is required, a digital SFP provides a means to monitor two real-time laser metrics associated with observing laser degradation and predicting failure: average laser bias current TxBias and average laser optical power TxPower.

Compliance Prediction
Compliance prediction is the ability to determine if an optical transceiver is operating within its operating and environmental requirements. AFBR-57F5MZ-ELX devices provide real-time access to transceiver internal supply voltage and temperature, allowing a host to identify potential component compliance issues. Received optical power is also available to assess compliance of a cable plant and remote transmitter. When operating out of requirements, the link cannot guarantee error free transmission.

Fault Isolation
The fault isolation feature allows a host to quickly pin-point the location of a link failure, minimizing downtime. For optical links, the ability to identify a fault at a local de-vice, remote device or cable plant is crucial to speeding service of an installation. AFBR-57F5MZ-ELX real-time monitors of TxBias, TxPower, Vcc, Temperature and RxPower can be used to assess local transceiver’s current operating conditions. In addition, status flags TxDisable and Rx Loss of Signal LOS are mirrored in memory and available via the two-wire serial interface.

Component Monitoring
Component evaluation is a more casual use of the AFBR-57F5MZ-ELX real-time monitors of TxBias, TxPower, Vcc, Temperature and RxPower. Potential uses are as debugging aids for system installation and design, and transceiver parametric evaluation for factory or field qualification. For example, temperature per module can be observed in high density applications to facilitate thermal evaluation of blades, PCI cards and systems.

Transmitter Section
The transmitter section includes a Transmitter Optical Subassembly TOSA, laser driver circuit, Clock and Data Recovery circuit CDR and an electrical input stage with variable equalization controls and electrical eye measurement capability. The TOSA contains a 850 nm Vertical Cavity Surface Emitting Laser VCSEL light source with integral light monitoring function and imaging optics to assure efficient optical coupling to the LC connector interface. The TOSA is driven by a laser driver IC, which uses the differential output from an integral Tx CDR stage to modulate and regulate VCSEL optical power. As mandated by FC-PI-5, the integral CDR cleans up any incoming jitter accumulated from the host ASIC, PCB traces and SFP electrical connector. Between the SFP electrical connector and Tx CDR is a variable, I2C-bus controlled, equalization circuit to optimize SFP performance with non-ideal in-coming electrical waveforms. Note the Tx CDR is engaged only with TxRATE=high 16GFC and bypassed with Tx_ RATE=low 8G/4G.

Transmit Disable TxDisable
The AFBR-57F5MZ-EKX accepts a TTL and CMOS compatible transmit disable control signal input pin 3, which shuts down the transmitter optical output. A high signal implements this function while a low signal allows normal transceiver operation. Host systems should allow a 10 ms interval between successive assertions of this control signal. TxDisable can also be asserted via the two-wire serial interface at address A2h, byte 110, bit 6 and monitored at address A2h, byte 110, bit 7. The contents of A2h, byte 110, bit 6 are logic OR’d with hardware TxDisable pin 3 to control transmitter operation.

Transmit Fault TxFault
A catastrophic laser fault will activate the transmitter signal, TXFAULT, and disable the laser. This signal is an open-collector output pull-up required on the host board. A low signal indicates normal laser operation, and a high signal indicates a fault. The TXFAULT will be latched high when a laser fault occurs and is cleared by toggling the TX_DISABLE input or power cycling the transceiver. The transmitter fault condition can also be monitored via the two-wire serial interface at address A2, byte 110, bit 2.

Eye Safety Circuit
The AFBR-57F5MZ provides Class 1 single fault tolerant eye safety by design and has been tested for compliance with the requirements (listed in product datasheet). The eye safety circuit continuously monitors the optical output power level and will disable the transmitter upon detecting an unsafe condition beyond the scope of Class 1 certification. Such unsafe conditions can be due to inputs from the host board Vcc fluctuation, unbalanced code, or a fault within the transceiver.

Receiver Section
The receiver section includes a Receiver Optical Subassembly ROSA, pre-amplification and post-amplification circuit, Clock and Data Recovery Circuit and an electrical output stage with variable emphasis controls. The ROSA, containing a highspeed PIN detector, pre-amplifier and imaging optics efficiently couple light from the LC connector interface and perform an optical to electrical conversion. The resulting differential electrical signal passes through a post amplification circuit and into a Clock and Data Recovery circuit CDR for cleaning up accumulated jitter. The resulting signal is passed to a highspeed output line driver stage with variable, I2C-bus controlled, emphasis settings allowing the host to optimize signal characteristics between the SFP and host ASIC. Note the Rx CDR is engaged only with RxRATE=high 16GFC and bypassed with RxRATE low 8G or 4G.

Receiver Loss of Signal RxLOS
The post-amplification IC also includes transition detection circuitry which monitors the ac level of incoming optical signals and provides a TTL CMOS compatible status signal to the host pin 8. An adequate optical input results in a low RxLOS output while a high RxLOS output indicates an unusable optical input. The RxLOS thresholds are factory set so that a high output indicates a definite optical fault has occurred. RxLOS can also be monitored via the two-wire serial interface at address A2h, byte 110, bit 1.

Functional Data I/O
The AFBR-57F5MZ interfaces with the host circuit board through twenty I/O pins SFP electrical connector identified by function explained in datasheet. The board layout for this inter-face is depicted in Figure 6.
The AFBR-57F5MZ high speed transmit and receive inter-faces require SFP MSA compliant signal lines on the host board. To simplify board requirements, biasing resistors and coupling capacitors are incorporated into the SFP transceiver module per SFF-8074i and hence are not re-quired on the host board. The TxDisable, TxFault, and RxLOS lines require TTL lines on the host board per SFF-8074i if used. If an application chooses not to take advantage of the functionality of these pins, care must be taken to ground TxDisable for normal operation.